文章來源為noraml matloff教授寫的Major Componets of Computer "Engine",文章有點老,意義還是有的:-)

History of Intel CPU Structure

The earliest widely-used Intel processor chip was the 8080. Its word size was 8 bits, and it included registers
named A, B, C and D (and a couple of others). Address size was 16 bits.
The next series of Intel chips, the 8086/8088,and then the 80286, featured 16-bit words and 20-bit addresses.
The A, B, C and D registers were accordingly extended to 16-bit size and renamed AX, BX, CX
and DX (‘X’ stood for “extended”). Other miscellaneous registers were added. The lower byte of AX was
called AL, the higher byte AH, and similarly for BL, BH, etc.
??? ??
??? ??? 最早被廣泛應用的Intel處理器是8080.它的字長為8,包括A,B,C,D(還有一些其他的)寄存器,地址長度為16位。接下來的Intel芯片是8086/8080，然后是80286，擁有16位的字長和20位的地址長度。A,B,C,D寄存器也相應的擴展到16位長，并被命名為AX,BX,CX,DX('X'代表"擴展的")。一些各種功能的寄存器也增加了。AX的低位被稱作AL，高位作為AH，BL，BH等也一樣。

Beginning with the 80386 and extending to the Pentium series, both word and address size has been 32 bits.
The registers were again extended in size, to 32 bits, and renamed EAX, EBX and so on (‘E’ for “extended”).
The pre-32-bit Intel CPUs, starting with 8086/8088, replaced the single register PC with a pair of registers,
CS (for code segment) and IP (for instruction pointer). A rough description is that the CS register pointed to
the code segment, which is the place in memory where the program’s instructions start, and the IP register
then specified the distance in bytes from that starting point to the current instruction. Thus by combining
the information given in c(CS) and c(IP), we obtained the absolute address of the current instruction.

??? ?? 從80386開始到奔騰系列，字長和地址長度都變成了32位，寄存器也再次擴展到32位，并被稱為EAX，EBX('E'代表"擴展的")。在32位之前的Intel CPU，從8086/8088開始，把單個PC寄存器用一對寄存器取代，CS(代碼段)和IP(指令指針)。一個粗糙的描述就是CS寄存器指向代碼段，也就是內存中程序指令開始執行的地方，IP寄存器接著指定用字節表示的從當前指令到起始點的距離。這樣通過兩者結合，我們可以得到當前指令的絕對地址。

This is still true today when an Intel CPU runs in in 16-bit mode, in which case it generates 20-bit addresses.
The CS register is only 16 bits, but it represents a 20-bit address whose least significant four bits are implicitly
0s. (This implies that code segments are allowed to begin only at addresses which are multiples of 16.)
The CPU generates the address of the current instruction by concatenating c(CS) with four 0 bits and then
adding the result to c(IP).

??? ?? 這在今天看來也仍是正確的，如果Intel CPU運行在16位模式，在這種情況下，它產生20位的地址。CS寄存器只有十六位，但它確表示二十位的地址，這就暗示地址的最低4位為'0'。(這表示代碼段只能在16的倍數的地址上開始)。CPU通過在CS上添加4個'0'位再加上IP的值來取得當前的指令地址。

Suppose for example the current instruction is located at 0x21082, and the code segment begins at 0x21040.
Then c(CS) and c(IP) will be 0x2104 and 0x0042, respectively, and when the instruction is to be executed,
its address will be generated by combining these two values as shown above.

??? ?? 假設當前的指令地位為0x21082，代碼段從0x21040開始，那么CS和IP就應該分別為0x2104和0x0042。當指令被執行時，它的地址就上面的兩個值相加得到。

The situation is similar for stacks and data. For example, instead of having a single SP register as in our
model of a typical CPU above, the earlier Intel CPUs (and current CPUs when they are running in 16-bit
mode) use a pair of registers, SS and SP. SS specifies the start of the stack segment, and SP contains the
distance from there to the current top-of-stack. For data, the DS register points to the start of the data
segment, and a 16-bit value contained in the instruction specifies the distance from there to the desired data
item.

??? ?? 棧和數據的情況也類似。例如，早期的Intel CPUs(和運行在16位模式的現在的CPUs)使用一對寄存器，SS和SP，而不是向上面典型的CPU那樣只用單個的SP寄存器。SS指定棧段的開始，SP包含從那里到棧頂的距離。對于數據來說，DS寄存器指向數據段的開始，指令中的一個16位的值指定到需要的數據項的距離。

Since IP, SP and the data-item distance specified within an instruction are all 16-bit quantities, it follows
that the code, stack and data segments are limited to 2¹⁶= 65, 536 bytes in size. This can make things quite
inconvenient for the programmer. If, for instance, we have an array of length, say, 100,000 bytes, we could
not fit the array into one data segment. We would need two such segments, and the programmer would have
to include in the program lines of code which change the value of c(DS) whenever it needs to access a part
of the array in the other data segment.

??? ?? 由于IP，SP以及指令中指定的數據的距離都是16位的值，這就使得代碼段，棧段和數據段的長度都被限制在2¹⁶= 65,536位。這樣對程序員來說很不方便。比如，如果我們有個數組的長度為，假如100,000byte，我們就不能把它放入一個數據段中。我們需要兩個這樣的段，而且當程序員需要訪問在另一個段中的數組時，需要在代碼行中放入改變DS值的代碼。

These problems are avoided by the newer operating systems which run on Intel machines today, such as
Windows and Linux, since they run in 32-bit mode. Addresses are also of size 32 bits in that mode, and IP,
SP and data-item distance are 32 bits as well. Thus a code segment, for instance, can fill all of memory, and
segment switching as illustrated above is unnecessary.

??? ?? 今天這些問題被運行在Intel機器上的新的操作系統避免了，例如Windows和Linux，由于他們運行在32位模式。這種模式下地址也是32位的，IP，SP和數據距離也同樣。這樣一個代碼段可以填滿整個內存，而且像上面那樣的段切換也不再需要了。

發現這一段的意思不是太大，不過還是堅持翻完了
時間也花了一個多小時，還是看快。

轉載于:https://www.cnblogs.com/denovo/archive/2006/08/21/482724.html

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