Linux Kernel Makefile Test
一、本文說(shuō)明
本文為linux內(nèi)核Makefile整體分析的續(xù)篇,是依據(jù)Linux內(nèi)核Makefile體系的主要內(nèi)容編寫(xiě)一個(gè)簡(jiǎn)要的測(cè)試工程。Linux內(nèi)核Makefile體系就好像一只“大鳥(niǎo)”,而這篇測(cè)試算是“麻雀”,主要是為了通過(guò)動(dòng)手實(shí)戰(zhàn)進(jìn)一步理解Linux內(nèi)核Makefile體系的原理和特點(diǎn)。
二、源碼結(jié)構(gòu)
1、測(cè)試源碼包括1個(gè)頂層目錄以及5個(gè)子目錄。
2、Makefile體系的構(gòu)成是頂層1個(gè)Makefile文件、scripts目錄中的4個(gè)腳本文件以及add、sub、main三個(gè)目錄中的Makefile文件。
3、C程序源碼是add/add.c、sub/sub.c、main/main.c
三、Makefile重要源碼展示
1、頂層Makefile
PHONY := MAKE := makesrctree := $(if $(KBUILD_SRC),$(KBUILD_SRC),$(CURDIR)) export srctree AS = $(CROSS_COMPILE)as LD = $(CROSS_COMPILE)ld CC = $(CROSS_COMPILE)gcc CPP = $(CC) -E AR = $(CROSS_COMPILE)ar NM = $(CROSS_COMPILE)nmexport AS LD CC CPP AR NM include $(srctree)/scripts/Kbuild.include //該文件中定義有build變量 all: targetsrcdir := add sub main PHONY += $(srcdir)objdir := $(srcdir) PHONY += $(objdir)target: $(srcdir) //總目標(biāo)的依賴(lài)是srcdirgcc -o target add/built-in.o sub/built-in.o main/built-in.o //定義總目標(biāo)的生成規(guī)則 $(srcdir): //通過(guò)srcdir依次生成各個(gè)子目錄中的*/built-in.o$(MAKE) $(build)=$@ clean-dirs := $(addprefix _clean_,$(objdir)) //clean-dirs其實(shí)與objdir中的目錄是一樣的,只是為了執(zhí)行不同的命令(clean-dirs要?jiǎng)h除目標(biāo)文件),所以要clean-dirs的前邊要加上前綴以與srcdir=objdir的目標(biāo)區(qū)別 PHONY += $(clean-dirs) clean$(clean-dirs):$(MAKE) $(clean)=$(patsubst _clean_%,%,$@)clean: $(clean-dirs)rm -f targetclean := -f scripts/Makefile.clean obj.PHONY: $(PHONY)2、srcdirs/Makefile.build
# ========================================================================== # Building # ==========================================================================src := $(obj)PHONY := __build __build: //Makefile.build中的總目標(biāo) include scripts/Kbuild.include# The filename Kbuild has precedence over Makefile kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) include $(kbuild-file) //包含子目錄中的Makefile include scripts/Makefile.libifneq ($(strip $(obj-y)),) builtin-target := $(obj)/built-in.o endif__build: $(builtin-target)# If the list of objects to link is empty, just create an empty built-in.o cmd_link_o_target = $(if $(strip $(obj-y)),\$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^))$(builtin-target): $(obj-y)$(call if_changed,link_o_target) //調(diào)用生成庫(kù)built-in.o的函數(shù) cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<define rule_cc_o_c$(cmd_cc_o_c) endef# Built-in and composite module parts $(obj)/%.o: $(src)/%.c $(call if_changed_rule,cc_o_c) //調(diào)用生成目標(biāo)文件.o的函數(shù) PHONY += FORCE FORCE:.PHONY: $(PHONY)3、srcdirs/Kbuild.include
build := -f scripts/Makefile.build objif_changed = $(cmd_$(1))//定義函數(shù)if_changed # Usage: $(call if_changed_rule,foo) # Will check if $(cmd_foo) or any of the prerequisites changed, # and if so will execute $(rule_foo). if_changed_rule = $(rule_$(1)) //定義函數(shù)if_changed_rule4、srcdirs/Makefile.lib
c_flags = //定義gcc編譯器選項(xiàng)ld_flags = $(LDFLAGS) $(ldflags-y) //定義ld連接器選項(xiàng) obj-y := $(patsubst %/, %/built-in.o, $(obj-y)) //對(duì)obj-y中的目錄添加built-in.oobj-y := $(addprefix $(obj)/,$(obj-y))//再添加obj前綴
5、srcdirs/Makefile.clean
# ========================================================================== # Cleaning up # ==========================================================================src := $(obj)PHONY := __clean //此為Makefile.clean中的總目標(biāo) __clean:rm -f $(obj)/*.o //刪除目標(biāo)文件.o
6、add/Makefile
obj-y += add.o?四、當(dāng)前源碼缺陷
1、沒(méi)有完成依賴(lài)的自動(dòng)生成
2、沒(méi)有完成生成目標(biāo)的目錄與源碼不在同一目錄的功能
?
附:LinuxKernelMakefileTest.zip
轉(zhuǎn)載于:https://www.cnblogs.com/amanlikethis/p/3676857.html
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